Hardware Modeling:
Hardware modeling can be done in Verilog, systemverilog, C++ using Matlab, ADS or other tools.

Design
Our expertise includes digital, analog, RF, mixed signal and I/O design.
Circuit design
Verilog, VHDL or VAMS
Cadence, Synopsys and other vendor IPs
Synthesis compiler and static timing analysis script files
Formal Verification
Power analysis
FPGA Vendor specific tools
AFT and ATPG
Clock Tree and signal integrity

Design Verification
Verification methodologies including UVM, SystemVerilog and coverage analysis.
Object oriented approach has greatly improved verification approach.
Constrained-random generation of stimulus
Code Coverage and Functional Coverage tools
Regressions
Verification IP integration

Physical Design
Basic cell library layout
Full custom layout
Floor plan
Place and route
Hierarchicaland flat design
Physical constraint generation
DRC, ERC, LVS, IR Drop, cross talk
Parasitic extraction
Worked with multiple foundaries

Low power
Multiple Power Supplies, switchable power domain and always on blocks. Battery support.
Low Power cell library, LDO, BandGaps, Bias, ISO and PSO cells. Sleep Modes. cpf and upf file generation

Tools
Mentor, Cadence, Synopsys and other vendor tools

Embedded Software Development
Dvita has significant experience in developing drivers and embedded software as per the customer specifications.

Team Augumentation:
We are the expert help on demand to ramp-up new resources.
We will find the right qualified engineer to match your requirements.
All candidates are thoroughly checked by senior dvita engineers before undergoing your screening process.
We use our in-house recruiting team to find potential candidates.
We insures that our engineers are meeting customer expectations throughout the project.
We listen to our customer needs, and always work hard to provide the highest value.